Datasheet

TVP5154A

www.ti.com

SLES214C–DECEMBER 2007–REVISED SEPTEMBER 2010

7.2.45 Patch Code Execute

Address 7Fh

Default 00h

7 6 5 4 3 2 1 0

R/W[7:0]

Writing to this register following a firmware patch load restarts the CPU and initiates execution of the patch

code. This register must not be written to or read from during normal operation.

7.2.46 LSB of Device ID Register

Address 81h

Default 54h

7 6 5 4 3 2 1 0

LSB of device ID

This register identifies the LSB of the device ID. Value = 0x54.

7.2.47 ROM Major Version Register

Address 82h

Default 02h

7 6 5 4 3 2 1 0

ROM major version

(1)

(1) This register can contain a number from 0x01 to 0xFF.

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