Datasheet

M
U
X
M
U
X
M
U
X
M
U
X
AIP1A
AIP1B
AIP2A
AIP2B
AIP3A
AIP3B
AIP4A
AIP4B
PGA
PGA
PGA
PGA
9−Bit
A/D
9−Bit
A/D
9−Bit
A/D
9−Bit
A/D
Y/C
VBI Data
Processor (VDP)
Luminance
Processing
Chrominance
Processing
Scaler
Scaler
Scaler
Scaler
Output Formatter
CH1_OUT [7:0]
YC
B
C
R
8−Bit 4:2:2
CH2_OUT [7:0]
YC
B
C
R
8−Bit 4:2:2
CH3_OUT [7:0]
YC
B
C
R
8−Bit 4:2:2
CH4_OUT [7:0]
YC
B
C
R
8−Bit 4:2:2
SCL
SDA
XIN/OSC
XOUT
Horizontal and
Color PLLs
Host
Interface
Embedded
Processor
Timing Processor
FID/GLCO[1−4]
VSYNC/PAL[1−4]
INTERQ/GPCL/BLK[1−4]
HSYNC[1−4]
AVID[1−4]
CLK[1−4]
SCLK[1−4]
Y/CY/CY/C
Separation
Separation Separation Separation
Output Formatter Output Formatter Output Formatter
Luminance
Processing
Chrominance
Processing
Luminance
Processing
Chrominance
Processing
Luminance
Processing
Chrominance
Processing
VBI Data
Processor (VDP)
VBI Data
Processor (VDP)
VBI Data
Processor (VDP)
TVP5154A
www.ti.com
SLES214CDECEMBER 2007REVISED SEPTEMBER 2010
2 Device Details
2.1 Functional Block Diagram
Figure 2-1. Functional Block Diagram
Copyright © 2007–2010, Texas Instruments Incorporated Device Details 5
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