Datasheet

TVP5154A
SLES214C–DECEMBER 2007–REVISED SEPTEMBER 2010 www.ti.com
7.2.29 Interrupt Enable Register B
Address 1Dh
Default 00h
7 6 5 4 3 2 1 0
Software initialization Reserved Reserved Field rate Line alternation Color lock H/V lock TV/VCR
occurred enable changed changed changed changed changed
Software initialization occurred enable:
0 = Disabled (default)
1 = Enabled
Field rate changed:
0 = Disabled (default)
1 = Enabled
Line alternation changed:
0 = Disabled (default)
1 = Enabled
Color lock changed:
0 = Disabled (default)
1 = Enabled
H/V lock changed:
0 = Disabled (default)
1 = Enabled
TV/VCR changed:
0 = Disabled (default)
1 = Enabled
Interrupt enable register B is used by the external processor to mask unnecessary interrupt sources for
interrupt B. Bits loaded with a 1 allow the corresponding interrupt condition to generate an interrupt on the
external pin. Conversely, bits loaded with zeros mask the corresponding interrupt condition from
generating an interrupt on the external pin. This register only affects the external pin; it does not affect the
bits in the interrupt status register. A given condition can set the appropriate bit in the status register and
not cause an interrupt on the external pin. To determine if this device is driving the interrupt pin, either
AND interrupt status register B with interrupt enable register B, or check the state of interrupt B in the
interrupt B active register.
48 Internal Control Registers Copyright © 2007–2010, Texas Instruments Incorporated
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