Datasheet

TVP5154A
SLES214C–DECEMBER 2007–REVISED SEPTEMBER 2010 www.ti.com
1 Introduction .............................................. 1
3.15 Clock and Data Control ............................. 18
1.1 Features .............................................. 1 4 I
2
C Host Interface ...................................... 19
1.2 Description ........................................... 1 4.1 I
2
C Write Operation ................................. 20
4.2 I
2
C Read Operation ................................. 20
1.3 Applications .......................................... 2
5 Clock Circuits .......................................... 22
1.4 Related Products ..................................... 3
6 Genlock Control and RTC ........................... 23
1.5 Trademarks .......................................... 3
6.1 TVP5154A Genlock Control Interface .............. 23
1.6 Document Conventions .............................. 3
6.2 RTC Mode .......................................... 23
1.7 Ordering Information ................................. 3
6.3 Reset and Power Down ............................ 24
2 Device Details ............................................ 5
6.4 Reset Sequence .................................... 25
2.1 Functional Block Diagram ............................ 5
7 Internal Control Registers ........................... 26
2.2 Terminal Diagram .................................... 6
7.1 Overview ............................................ 26
2.3 Terminal Functions ................................... 7
7.2 Direct Register Definitions .......................... 29
3 Functional Description ................................. 9
7.3 Indirect Register Definitions ........................ 75
3.1 Analog Front End .................................... 9
8 Scaler Configuration .................................. 79
3.2 Composite Processing Block Diagram ............... 9
8.1 Overview ............................................ 79
3.3 Adaptive Comb Filtering ............................ 10
8.2 Horizontal Scaling .................................. 79
3.4 Color Low-Pass Filter ............................... 11
8.3 Vertical Scaling ..................................... 80
3.5 Luminance Processing ............................. 11
8.4 Field Interleaving ................................... 81
9 Electrical Specifications ............................. 82
3.6 Chrominance Processing ........................... 11
9.1 Absolute Maximum Ratings ........................ 82
3.7 Timing Processor ................................... 11
9.2 Recommended Operating Conditions .............. 82
3.8 VBI Data Processor ................................ 12
9.3 Reference Clock Specifications .................... 82
3.9 VBI FIFO and Ancillary Data in Video Stream ..... 13
9.4 Electrical Characteristics ........................... 83
3.10 Raw Video Data Output ............................ 14
9.5 Timing Requirements ............................... 84
3.11 Output Formatter ................................... 14
9.6 I
2
C Host Port Timing ................................ 85
3.12 Synchronization Signals ............................ 14
9.7 Thermal Specifications ............................. 85
3.13 Active Video (AVID) Cropping ...................... 15
10 Schematic ............................................... 86
3.14 Embedded Syncs ................................... 17
11 Revision History ....................................... 87
4 Contents Copyright © 2007–2010, Texas Instruments Incorporated
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