Datasheet

TVP5154A
www.ti.com SLES214C–DECEMBER 2007–REVISED SEPTEMBER 2010
7.2 Direct Register Definitions
Direct registers are written to by performing a 3-byte I
2
C transaction:
START : DEVICE_ID : SUB_ADDRESS : DATA : STOP
Each direct register is eight bits wide.
7.2.1 Video Input Source Selection #1 Register
Address 00h
Default 00h
7 6 5 4 3 2 1 0
Reserved Black output Reserved Channel n source selection S-video selection
Channel n source selection:
0 = AIPnA selected (default)
1 = AIPnB selected
Table 7-2. Analog Channel and Video Mode Selection
ADDRESS 00
INPUT(S) SELECTED
BIT 1 BIT 0
AIPnA (default) 0 0
Composite
AIPnB 1 0
S-Video AIPnA (luma), AIPnB (chroma) x 1
Where n = 1, 2, 3, 4
Black output:
0 = Normal operation (default)
1 = Force black screen output (outputs synchronized)
a. Forced to 10h in normal mode
b. Forced to 01h in extended mode
Copyright © 2007–2010, Texas Instruments Incorporated Internal Control Registers 29
Submit Documentation Feedback
Product Folder Link(s): TVP5154A