Datasheet

RESETB
Normal Operation
Reset
PLL_AVDD
DVDD
IO_DVDD
SDA
PDN
SCL
Data
t1
t2
t3
TVP5154A
www.ti.com SLES214C–DECEMBER 2007–REVISED SEPTEMBER 2010
Table 6-1. Reset and Power-Down Modes
PDN RESETB CONFIGURATION
0 0 Reserved (unknown state)
0 1 Powers down the decoder
1 0 Resets the decoder
1 1 Normal operation
Figure 6-2. Power-On Reset Timing
Table 6-2. Power-On Reset Timing
NO. PARAMETER MIN MAX UNIT
t1 Delay time between power supplies active and reset 20 ms
t2 RESETB pulse duration 500 ns
t3 Delay time between end of reset to I
2
C active 200 µs
6.4 Reset Sequence
Table 6-3 shows the reset sequence of the TVP5154A pins status during reset time and immediately after
reset time.
Table 6-3. Reset Sequence
IMMEDIATELY
PIN DESCRIPTION DURING RESETB
AFTER RESETB
INTREQ1/GPCL1/VBLK1, INTREQ2/GPCL2/VBLK2, INTREQ3/GPCL3/VBLK3,
INTREQ4/GPCL4/VBLK4, HSYNC1, HSYNC2, HSYNC3, HSYNC4, VSYNC1/PALI1,
3-state 3-state
VSYNC2/PALI2, VSYNC3/PALI3, VSYNC4/PALI4, CH1_OUT[7:0], CH2_OUT[7:0],
CH3_OUT[7:0], CH4_OUT[7:0],
AIP1A, AIP1B, AIP2A, AIP2B, AIP3A, AIP3B, AIP4A, AIP4B, RESETB, PDN, SDA, SCL,
Input Input
I2CA0, I2CA1, XIN/OSC, TMS
FID1/GLCO1, FID2/GLCO2, FID3/GLCO3, FID4/GLCO4, AVID1, AVID2, AVID3, AVID4,
Output Output
CLK1, CLK2, CLK3, CLK4, SCLK1, SCLK2, SCLK3, SCLK4, XOUT
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