Datasheet

TVP5154A
SLES214CDECEMBER 2007REVISED SEPTEMBER 2010
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3.8 VBI Data Processor
The TVP5154A VBI data processor (VDP) slices various data services, such as teletext (WST, NABTS),
closed caption (CC), wide screen signaling (WSS), etc. These services are acquired by programming the
VDP to enable standards in the VBI. The results are stored in a FIFO and/or registers. The teletext results
are stored in a FIFO only. Table 3-1 lists a summary of the types of VBI data supported according to the
video standard. It supports ITU-R BT.601 sampling for each.
Table 3-1. Data Types Supported by the VDP
LINE MODE REGISTER
NAME DESCRIPTION
(D0h–FCh) BITS [3:0]
0000b WST SECAM Teletext, SECAM
0001b WST PAL B Teletext, PAL, System B
0010b WST PAL C Teletext, PAL, System C
0011b WST, NTSC B Teletext, NTSC, System B
0100b NABTS, NTSC C Teletext, NTSC, System C
0101b NABTS, NTSC D Teletext, NTSC, System D (Japan)
0110b CC, PAL Closed caption PAL
0111b CC, NTSC Closed caption NTSC
1000b WSS/CGMS-A, PAL Wide-screen signaling/Copy Generation Management System-Analog, PAL
1001b WSS/CGMS-A, NTSC Wide-screen signaling/Copy Generation Management System-Analog, NTSC
1010b VITC, PAL Vertical interval timecode, PAL
1011b VITC, NTSC Vertical interval timecode, NTSC
1100b VPS, PAL Video program system, PAL
1101b Gemstar 2x Custom 1 Electronic program guide
1110b Reserved Reserved
1111b Active Video Active video/full field
At power up, the host interface is required to program the VDP-configuration RAM (VDP-CRAM) contents
with the lookup table (see Section 7.2.69). This is done through port address C3h. Each read from or write
to this address auto increments an internal counter to the next RAM location. To access the VDP-CRAM,
the line mode registers (D0h–FCh) must be programmed with FFh to avoid a conflict with the internal
microprocessor and the VDP in both writing and reading. Full field mode must also be disabled.
Available VBI lines are from line 6 to line 27 of both field 1 and field 2. Each line can be any VBI mode.
Output data is available either through the VBI-FIFO (B0h) or through dedicated registers at 90h–AFh,
both of which are available through the I
2
C port.
12 Functional Description Copyright © 2007–2010, Texas Instruments Incorporated
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