Datasheet

TVP5151

SLES241E–SEPTEMBER 2009–REVISED OCTOBER 2011

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7 Revision History

Table 7-1. Revision History

REVISION COMMENTS

SLES241 Initial release

Section 1.4, Related Products added

Section 1.5, Trademarks modified

Section 3.16, Figure 3-8 changed to depict various clocking options. Changed crystal parallel resistor recommendation.

Section 3.21.10, Luminance Brightness description modified

SLES241A

Section 3.21.11, Chrominance Saturation description modified

Section 3.21.50, Status Register #3 description modified

Section 6.1, Changed recommendation for resistor in parallel with the crystal

Minor editorial changes throughout

Section 3.3, Figure 3-2, Chroma trap filter characteristics for NTSC added.

Section 3.3, Figure 3-3, Chroma trap filter characteristics for PAL added.

Section 3.4, Figure 3-4, Color low-pass filter characteristics added.

SLES241B

Section 3.8, Table 3-1, Modified name for register 1100b.

Section 3.20, Table 3-11, Added I2C indirect registers at address 21h-24h.

Section 4.9, Added Power Dissipation Ratings.

AEC-Q100 qualification added.

Section 3.13, Updated description.

Section 3.21.29, Added Indirect Register Data

Section 3.21.30, Added Indirect Register Address

SLES241C

Section 3.21.31, Added Indirect Register Read/Write Strobe

Section 3.21.38, Added Patch Write Address

Section 3.21.39, Added Patch Code Execute

Section 3.21.53, Added Patch Read Address

SLES241D Removed AEC-Q100 qualification.

Table 2-1, Modified description for terminal 27.

Table 3-11, Modified registers 82h and 83h.

Section 3.21.4, Modified description for bits 7:5 of I2C register 03h.

SLES241E

Section 3.21.15, Removed support for 1x output clock frequency (bit 0 of register 0Fh).

Section 3.21.42, Modified the register description for register 82h.

Section 3.21.43, Modified the register description for register 83h.

Figure 6-1, Added note concerning ESD protection. Added pulldown and pullup resistors to pin 27 output.

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