Datasheet

V
OH
YOUT[7:0], AVID,
VSYNC, HSYNC,
FID/GLCO
V
OL
Valid DataValid Data
SCLK
t
3
t
1
t
2
t
5
t
4
TVP5151
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SLES241ESEPTEMBER 2009 REVISED OCTOBER 2011
4.7 Clocks, Video Data, Sync Timing
PARAMETER TEST CONDITIONS
(1)
MIN TYP MAX UNIT
Duty cycle, SCLK 47 50 53 %
t1 SCLK high time 90% 18.5 ns
t2 SCLK low time 10% 18.5 ns
t3 SCLK fall time 90% to 10% 5 ns
t4 SCLK rise time 10% to 90% 5 ns
t5 Propagation delay time 3 8 ns
(1) Measured with 22-Ω series termination resistors and 10-pF load.
Figure 4-1. Clocks, Video Data, and Sync Timing
Copyright © 20092011, Texas Instruments Incorporated Electrical Specifications 73
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