Datasheet

TVP5151

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SLES241E–SEPTEMBER 2009– REVISED OCTOBER 2011

3.21.56 VPS Data Registers

Address 9Ah–A6h

Address 7 6 5 4 3 2 1 0

9Ah VPS byte 1

9Bh VPS byte 2

9Ch VPS byte 3

9Dh VPS byte 4

9Eh VPS byte 5

9Fh VPS byte 6

A0h VPS byte 7

A1h VPS byte 8

A2h VPS byte 9

A3h VPS byte 10

A4h VPS byte 11

A5h VPS byte 12

A6h VPS byte 13

These registers contain the entire VPS data line except the clock run-in code and the start code.

3.21.57 VITC Data Registers

Address A7h–AFh

Address 7 6 5 4 3 2 1 0

A7h VITC byte 1, frame byte 1

A8h VITC byte 2, frame byte 2

A9h VITC byte 3, seconds byte 1

AAh VITC byte 4, seconds byte 2

ABh VITC byte 5, minutes byte 1

ACh VITC byte 6, minutes byte 2

ADh VITC byte 7, hour byte 1

AEh VITC byte 8, hour byte 2

AFh VITC byte 9, CRC

These registers contain the VITC data.

3.21.58 VBI FIFO Read Data Register

Address B0h

7 6 5 4 3 2 1 0

FIFO read data

This address is provided to access VBI data in the FIFO through the host port. All forms of teletext data

come directly from the FIFO, while all other forms of VBI data can be programmed to come from the

registers or from the FIFO. Current status of the FIFO can be found at address C6h and the number of

bytes in the FIFO is located at address C7h. If the host port is to be used to read data from the FIFO, then

the host access enable bit at address CDh must be set to 1. The format used for the VBI FIFO is shown in

Section 3.9.

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