Datasheet

TVP5151
SLES241ESEPTEMBER 2009REVISED OCTOBER 2011
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3.21.42 ROM Version Register
Address 82h
Default 04h
7 6 5 4 3 2 1 0
ROM version [7:0]
ROM Version [7:0]: This register identifies the ROM code revision number.
3.21.43 RAM Version Register
Address 83h
Default 00h
7 6 5 4 3 2 1 0
RAM version [7:0]
RAM Version [7:0]: This register identifies the RAM code revision number.
Example:
Patch Release = v01.25
ROM Version = 01h
RAM Version = 25h
Note: Use of the latest patch release is highly recommended.
3.21.44 Vertical Line Count MSB Register
Address 84h
7 6 5 4 3 2 1 0
Reserved Vertical line count MSB
Vertical line count bits [9:8]
3.21.45 Vertical Line Count LSB Register
Address 85h
7 6 5 4 3 2 1 0
Vertical line count LSB
Vertical line count bits [7:0]
Registers 84h and 85h can be read and combined to extract the detected number of lines per frame. This
can be used with nonstandard video signals such as a VCR in fast-forward or rewind modes to
synchronize the downstream video circuitry.
52 Functional Description Copyright © 20092011, Texas Instruments Incorporated
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