Datasheet

TVP5151

SLES241E–SEPTEMBER 2009–REVISED OCTOBER 2011

www.ti.com

IDID1: Bit 0/1 = Transaction video line number [9:8]

Bit 2 = Match 2 flag

Bit 3 = Match 1 flag

Bit 4 = 1 if an error was detected in the EDC block; 0 if not

CS: Sum of D0–D7 of DID through last data byte.

Fill byte: Fill bytes make a multiple of 4 bytes from byte 0 to last fill byte.

3.10 Raw Video Data Output

The TVP5151 decoder can output raw A/D video data at 2x sampling rate for external VBI slicing. This is

transmitted as an ancillary data block during the active horizontal portion of the line and during vertical

blanking.

3.11 Output Formatter

The YCbCr digital output can be programmed as 8-bit 4:2:2 or 8-bit ITU-R BT.656 parallel interface

standard.

Table 3-3. Summary of Line Frequencies, Data Rates, and Pixel Counts

COLOR

ACTIVE PIXEL HORIZONTAL

STANDARDS PIXELS PER LINES PER SUB-CARRIER

PIXELS PER FREQUENCY LINE RATE

(ITU-R BT.601) LINE FRAME FREQUENCY

LINE (MHz) (kHz)

(MHz)

NTSC-J, M 858 720 525 13.5 3.579545 15.73426

NTSC-4.43 858 720 525 13.5 4.43361875 15.73426

PAL-M 858 720 525 13.5 3.57561149 15.73426

PAL-B, D, G, H, I 864 720 625 13.5 4.43361875 15.625

PAL-N 864 720 625 13.5 4.43361875 15.625

PAL-Nc 864 720 625 13.5 3.58205625 15.625

SECAM 864 720 625 13.5 4.40625/4.25 15.625

3.12 Synchronization Signals

External (discrete) syncs are provided via the following signals (see Figure 3-5 and Figure 3-6):

• VSYNC (vertical sync)

• FID/VLK (field indicator or vertical lock indicator)

• INTREQ/GPCL/VBLK (general-purpose output or vertical blanking indicator)

• PALI/HLK (PAL switch indicator or horizontal lock indicator)

• HSYNC (horizontal sync)

• AVID (active video indicator) (if set as output)

VSYNC, FID, PALI, and VBLK are software set and programmable to the SCLK pixel count. This allows

any possible alignment to the internal pixel count and line count. The default settings for a 525-/625-line

video output are given as an example.

Submit Documentation Feedback