Datasheet

Functional Description
37
May 2006 SLES043A
Interrupt reset register B is used by the external processor to reset the interrupt status bits in interrupt status
register B. Bits loaded with a 1 allow the corresponding interrupt status bit to reset to 0. Bits loaded with a 0
have no effect on the interrupt status bits.
3.22.28 Interrupt Enable Register B
Address 1Dh
7 6 5 4 3 2 1 0
Software initialization
occurred enable
Macrovision
detect changed
Command
ready enable
Field rate
changed
Line alternation
changed
Color lock
changed
H/V lock
changed
TV/VCR
changed
Software initialization occurred enable:
0 = Disabled (default)
1 = Enabled
Macrovision detect changed:
0 = Disabled (default)
1 = Enabled
Command ready enable:
0 = Disabled (default)
1 = Enabled
Field rate changed:
0 = Disabled (default)
1 = Enabled
Line alternation changed:
0 = Disabled (default)
1 = Enabled
Color lock changed:
0 = Disabled (default)
1 = Enabled
H/V lock changed:
0 = Disabled (default)
1 = Enabled
TV/VCR changed:
0 = Disabled (default)
1 = Enabled
Interrupt enable register B is used by the external processor to mask unnecessary interrupt sources for
interrupt B. Bits loaded with a 1 allow the corresponding interrupt condition to generate an interrupt on the
external pin. Conversely, bits loaded with a 0 mask the corresponding interrupt condition from generating an
interrupt on the external pin. This register only affects the external pin, it does not affect the bits in the interrupt
status register. A given condition can set the appropriate bit in the status register and not cause an interrupt
on the external pin. To determine if this device is driving the interrupt pin either AND interrupt status register
B with interrupt enable register B or check the state of interrupt B in the interrupt B active register.