Datasheet

Functional Description
25
May 2006 SLES043A
Table 3−8. Registers Summary (Continued)
REGISTER FUNCTION ADDRESS DEFAULT R/W
Teletext filter enable BBh 00h R/W
Reserved BCh−BFh
Interrupt status register A C0h 00h R/W
Interrupt enable register A C1h 00h R/W
Interrupt configuration C2h 04h R/W
VDP configuration RAM data C3h DCh R/W
Configuration RAM address low byte C4h 0Fh R/W
Configuration RAM address high byte C5h 00h R/W
VDP status register C6h R/W
FIFO word count C7h R
FIFO interrupt threshold C8h 80h R/W
FIFO reset C9h 00h W
Line number interrupt CAh 00h R/W
Pixel alignment register low byte CBh 59h R/W
Pixel alignment register high byte CCh 03h R/W
FIFO output control CDh 01h R/W
Automatic initialization CEh 00h R/W
Full field enable CFh 00h R/W
Line mode registers D0h−FBh FFh R/W
Full field mode register FCh 7Fh R/W
Reserved FDh−FFh
R = Read only
W = Write only
R/W = Read and write
3.22 Register Definitions
3.22.1 Video Input Source Selection #1 Register
Address 00h
7 6 5 4 3 2 1 0
Reserved
Channel 1 source
selection
S-video selection
Channel 1 source selection:
0 = AIP1A selected (default)
1 = AIP1B selected
Table 3−9. Analog Channel and Video Mode Selection
INPUT(S) SELECTED
ADDRESS 00
INPUT(S) SELECTED
BIT 1 BIT 0
Composite AIP1A (default) 0 0
AIP1B 1 0
S-Video 1A luma, 2A chroma x 1