Datasheet

2−27
2.20.21 Genlock and RTC Register
Address 15h
Default 01h
7 6 5 4 3 2 1 0
Reserved F/V bit control Reserved GLCO/RTC
F/V bit control
BIT 5 BIT 4 NUMBER OF LINES F BIT V BIT
Standard ITU-R BT.656 ITU-R BT.656
0 0
Nonstandard even Force to 1 Switch at field boundary
0
0
Nonstandard odd Toggles Switch at field boundary
0
1
Standard ITU-R BT.656 ITU-R BT.656
0
1
Nonstandard Toggles Switch at field boundary
1
0
Standard ITU-R BT.656 ITU-R BT.656
1
0
Nonstandard Pulse mode Switch at field boundary
1 1 Illegal
GLCO/RTC. The following table helps in understanding the different modes.
BIT 2 BIT 1 BIT 0 GENLOCK/RTC MODE
0 X 0 GLCO
0 X 1 RTC output mode 0 (default)
1 X 0 GLCO
1 X 1 RTC output mode 1
All other values are reserved.
Figure 2−6 shows the timing of GLCO and Figure 2−7 shows the timing of RTC.