Datasheet

2−3
2.7 Timing Processor
The timing processor is a combination of hardware and software running in the internal microprocessor that serves
to control horizontal lock to the input sync pulse edge, AGC and offset adjustment in the analog front end, vertical
sync detection, and Macrovisiont detection.
2.8 VBI Data Processor
The TVP5150A VBI data processor (VDP) slices various data services like teletext (WST, NABTS), closed caption
(CC), wide screen signaling (WSS), etc. These services are acquired by programming the VDP to enable standards
in the VBI. The results are stored in a FIFO and/or registers. The teletext results are stored in a FIFO only. Table 2−1
lists a summary of the types of VBI data supported according to the video standard. It supports ITU-R BT. 601
sampling for each.
Table 2−1. Data Types Supported by the VDP
LINE MODE
REGISTER (D0h−FCh)
BITS [3:0]
SAMPLING
RATE (0Dh)
BIT 7
NAME DESCRIPTION
0000b x x Reserved
0000b 1 WST SECAM 6 Teletext, SECAM, ITU-R BT.601
0001b x x Reserved
0001b 1 WST PAL B 6 Teletext, PAL, System B, ITU-R BT.601
0010b x x Reserved
0010b 1 WST PAL C 6 Teletext, PAL, System C, ITU-R BT.601
0011b x x Reserved
0011b 1 WST, NTSC B 6 Teletext, NTSC, System B, ITU-R BT.601
0100b x x Reserved
0100b 1 NABTS, NTSC C 6 Teletext, NTSC, System C, ITU-R BT.601
0101b x x Reserved
0101b 1 NABTS, NTSC D 6 Teletext, NTSC, System D (Japan), ITU-R BT.601
0110b x x Reserved
0110b 1 CC, PAL 6 Closed caption PAL, ITU-R BT.601
0111b x x Reserved
0111b 1 CC, NTSC 6 Closed caption NTSC, ITU-R BT.601
1000b x x Reserved
1000b 1 WSS, PAL 6 Wide-screen signal, PAL, ITU-R BT.601
1001b x x Reserved
1001b 1 WSS, NTSC 6 Wide-screen signal, NTSC, ITU-R BT.601
1010b x x Reserved
1010b 1 VITC, PAL 6 Vertical interval timecode, PAL, ITU-R BT.601
1011b x x Reserved
1011b 1 VITC, NTSC 6 Vertical interval timecode, NTSC, ITU-R BT.601
1100b x x Reserved
1100b 1 VPS, PAL 6 Video program system, PAL, ITU-R BT.601
1101b x x Reserved
1110b x x Reserved
1111b x Active Video Active video/full field