Datasheet
DVDD
IO_DVDD
IO_DVDD
AVDD
AVID
AVDD
HSYNC
PDN
IO_DVDD
INTREQ/GPCL/VBLK
PDN
INTREQ/GPCL/VBLK
AVID
HSYNC
VSYNC/PALI
FID/GLCO
SCLK
OSC_IN
YOUT[7:0]
RESETB
VSYNC/PALI
SCL
SCLK
CH1_IN
CH2_IN
OSC_IN
SDA
FID/GLCO
C1
1 µF
C5
0.1 µF
R1
R5
C4
0.1 µF
R2
37.4 W
R6
37.4 W
R3
2.2 kW
R4
2.2 kW
C10
0.1 µF
C6
0.1 µF
Y1
14.31818 MHz ± 50 ppm
C2
1 µF
C8
CL1
C3
1 µF
C9
CL2
S1
1 2
C7
0.1 µF
R7
10 kW
TVP5150AM1
1
2
3
4
25
5
26
6
27
7
28
8
29
9
30
10
31
11
32
12
13
14
15
16
17
18
19
20
21
22
23
24
AIP1A
AIP1B
PLL_AGND
PLL_AVDD
XTAL1/OSC_IN
XTAL2
AGND
RESETB
SCLK
IO_DVDD
YOUT7/I2CSEL
YOUT6
YOUT5
YOUT4
YOUT3
YOUT2
YOUT1
YOUT0
DGND
DVDD
SCL
SDA
FID/GLCO
VSYNC/PALI
HSYNC
AVID
INTREQ/GPCL/VBLK
PDN
REFP
REFM
CH_AGND
CH_AVDD
Implies I C address is BAh. If B8h is to be used,
connect pulldown resistor to digital ground.
2
0.1 µF
C11
37.4 W
37.4 W
R
AAF
AAF
IO_DVDD
10 k
See Note I
W
10 kW
See Note H
TVP5150AM1
SLES209E–NOVEMBER 2007–REVISED OCTOBER 2011
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6 Application Information
6.1 Application Example
A. The use of INTREQ/GPCL/VBLK, AVID, HSYNC, and VSYNC/PALI is optional.
B. When OSC_IN is connected through S1, remove the capacitors for the crystal.
C. PDN needs to be high, if device has to be always operational.
D. RESETB is operational only when PDN is high. This allows an active-low reset to the device.
E. 100-kΩ resistor (R) in parallel with the crystal is recommended for most crystal types.
F. Anti-aliasing filter (AAF) highly recommended for best video quality.
G. System level ESD protection is not included in this application circuit, but it is highly recommended on the analog
video inputs.
H. An external 10-kΩ pulldown resistor is required when the INTREQ/GPCL/VBLK output (pin 27) is disabled (bit 5 of I
2
C
register 03h is set to 0).
I. An external 10-kΩ pullup resistor is required when the INTREQ/GPCL/VBLK output (pin 27) is enabled and
configured as an active-low interrupt (bit 5 of I
2
C register 03h is set to 1, bit 1 of I
2
C register 0Fh is set to 0, and bit 0
of I
2
C register 1Eh is set to 0).
Figure 6-1. Application Example
80 Application Information Copyright © 2007–2011, Texas Instruments Incorporated
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