Datasheet
TVP5150AM1
SLES209E–NOVEMBER 2007–REVISED OCTOBER 2011
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2.3 Terminal Functions
Table 2-1. Terminal Functions
TERMINAL
NO. I/O DESCRIPTION
NAME
ZQC PBS
Analog Section
AGND E1 7 G Substrate. Connect to analog ground.
Analog input. Connect to the video analog input via 0.1-µF capacitor. The maximum input
AIP1A A1 1 I range is 0-0.75 V
PP
, and may require an attenuator to reduce the input amplitude to the
desired level. If not used, connect to AGND via a 0.1-µF capacitor (see Figure 6-1).
Analog input. Connect to the video analog input via 0.1-µF capacitor. The maximum input
AIP1B B1 2 I range is 0-0.75 V
PP
, and may require an attenuator to reduce the input amplitude to the
desired level. If not used, connect to AGND via a 0.1-µF capacitor (see Figure 6-1).
CH_AGND A3 31 G Analog ground
CH_AVDD A2 32 P Analog supply. Connect to 1.8-V analog supply.
B2, B3,
B6, C4,
C5,
NC – – No connect
D3–D6,
E2–E5,
F2, F5, F6
PLL_AGND C2 3 G PLL ground. Connect to analog ground.
PLL_AVDD C1 4 P PLL supply. Connect to 1.8-V analog supply.
ADC reference negative output. Connect to analog ground through a 1-µF capacitor. Also, it
REFM A4 30 O
is recommended to connect directly to REFP through a 1-µF capacitor (see Figure 6-1).
ADC reference positive output. Connect to analog ground through a 1-µF capacitor (see
REFP B4 29 O
Figure 6-1).
XTAL1/OSC D2 5 I External clock reference input.
External clock reference output. Not connected if XTAL1 is driven by an external
XTAL2 D1 6 O
single-ended oscillator.
Digital Section
Active video indicator output. This signal is high during the horizontal active time of the
AVID A6 26 O video AVID output. AVID toggling during vertical blanking intervals is controlled by bit 2 of
the active video cropping start pixel LSB register at address 12h (see Section 3.21.17).
DGND E6 19 G Digital ground
DVDD E7 20 P Digital supply. Connect to 1.8-V digital supply.
FID: Odd/even field indicator or vertical lock indicator. For the odd/even indicator, a 1
indicates the odd field.
FID/GLCO C6 23 O GLCO: This serial output carries color PLL information. A slave device can decode the
information to allow chrominance frequency control from the TVP5150AM1 decoder. Data is
transmitted at the SCLK rate in Genlock mode. In RTC mode, SCLK/4 is used.
HSYNC A7 25 O Horizontal synchronization signal
This terminal has three functions selectable by bit 7 of I
2
C register 03h and bit 1 of I
2
C
register 0Fh:
• INTREQ: Interrupt request output
• GPCL: General-purpose control logic output. In this mode, the state of terminal 27 is
INTREQ/GPCL/
B5 27 O
directly programmed via I
2
C.
VBLK
• VBLK: Vertical blanking output. In this mode, terminal 27 indicates the vertical blanking
interval of the output video. The beginning and end times of this signal are
programmable via I
2
C.
An external pullup or pulldown resistor is required under certain conditions (see Figure 6-1).
IO_DVDD G2 10 P Digital output supply. Connect to 3.3-V digital supply.
SCLK G1 9 O System clock at 2x the frequency of the pixel clock.
Power-down terminal (active low). Puts the decoder in standby mode. Preserves the value
PDN A5 28 I
of the registers.
8 Device Details Copyright © 2007–2011, Texas Instruments Incorporated
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