Datasheet

TVP5150AM1
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SLES209ENOVEMBER 2007 REVISED OCTOBER 2011
3.21.43 ROM Version Register
Address 82h
Default 04h
7 6 5 4 3 2 1 0
ROM version [7:0]
ROM Version [7:0]: This register identifies the ROM code revision number.
3.21.44 RAM Version MSB Register
Address 83h
Default 00h
7 6 5 4 3 2 1 0
RAM version MSB [7:0]
RAM Version MSB [7:0]: This register identifies the MSB of the RAM code revision number.
Example:
Patch Release = v04.8C.AA
ROM Version = 04h
RAM Version MSB = 8Ch
RAM Version LSB = AAh
Note: Use of the latest patch release is highly recommended.
3.21.45 Vertical Line Count MSB Register
Address 84h
7 6 5 4 3 2 1 0
Reserved Vertical line count MSB
Vertical line count bits [9:8]
3.21.46 Vertical Line Count LSB Register
Address 85h
7 6 5 4 3 2 1 0
Vertical line count LSB
Vertical line count bits [7:0]
Registers 84h and 85h can be read and combined to extract the detected number of lines per frame. This
can be used with nonstandard video signals such as a VCR in fast-forward or rewind modes to
synchronize the downstream video circuitry.
Copyright © 20072011, Texas Instruments Incorporated Functional Description 55
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