Datasheet
TVP5150AM1
SLES209E–NOVEMBER 2007–REVISED OCTOBER 2011
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3 Functional Description
3.1 Analog Front End
The TVP5150AM1 decoder has an analog input channel that accepts two video inputs that are
ac-coupled. The decoder supports a maximum input voltage range of 0.75 V; therefore, an attenuation of
one-half is needed for most input signals with a peak-to-peak variation of 1.5 V. The nominal parallel
termination before the input to the device is recommended to be 75 Ω. See the application diagram in
Figure 6-1 for the recommended configuration. The two analog input ports can be connected as either of
the following:
• Two selectable composite video inputs
• One S-video input
An internal clamping circuit restores the sync-tip of the ac-coupled video signal to a fixed dc level.
The programmable gain amplifier (PGA) and the automatic gain control (AGC) algorithm work together to
make sure that the input signal is amplified sufficiently to ensure the proper input range for the ADC.
The ADC has nine bits of resolution and runs at a nominal speed of 27 MHz. The clock input for the ADC
comes from the horizontal PLL.
3.2 Composite Processing Block Diagram
The composite processing block processes NTSC/PAL/SECAM signals into the YCbCr color space.
Figure 3-1 shows the basic architecture of this processing block.
Figure 3-1 shows the luminance/chrominance (Y/C) separation process in the TVP5150AM1 decoder. The
composite video is multiplied by subcarrier signals in the quadrature modulator to generate the color
difference signals Cb and Cr. Cb and Cr are then low pass (LP) filtered to achieve the desired bandwidth
and to reduce crosstalk.
An adaptive four-line comb filter separates CbCr from Y. Chrominance is remodulated through another
quadrature modulator and subtracted from the line-delayed composite video to generate luminance.
Brightness, hue, saturation, and sharpness (using the peaking filter) are programmable via I
2
C.
The Y/C separation is bypassed for S-video input. For S-video, the remodulation path is disabled.
10 Functional Description Copyright © 2007–2011, Texas Instruments Incorporated
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