Datasheet

TVP5147M1
SLES140G –JULY 2005–REVISED FEBRUARY 2012 www.ti.com
Table 2-121. Analog Output Control 2 Register
Subaddress A0 005Eh
Default B2h
7 6 5 4 3 2 1 0
Reserved Input Select [1:0] Gain[3:0]
Analog input select [1:0]:
These bits are effective when manual input select bit is set to 1 at subaddress 7Fh, bit 1.
00 = CH1 selected
01 = CH2 selected
10 = CH3 selected
11= CH4 selected (default)
Analog output PGA gain [3:0]:
These bits are effective when analog output AGC is disabled.
Gain[3:0] Mode 1
0000 1.30
0001 1.56
0010 1.82
(default)
0011 2.08
0100 2.34
0101 2.60
0110 2.86
0111 3.12
1000 3.38
1001 3.64
1010 3.90
1011 4.16
1100 4.42
1101 4.68
1110 4.94
1111 5.20
Table 2-122. Interrupt Configuration Register
Subaddress B0 0060h
Default 00h
7 6 5 4 3 2 1 0
Reserved Polarity Reserved
Polarity:
Interrupt terminal polarity
0 = Active high (default)
1 = Active low
92 Functional Description Copyright © 2005–2012, Texas Instruments Incorporated
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