Datasheet

Y[9:0]
NTSC 601 106
PAL 601
DATACLK = 2× Pixel Clock
112
128
128
42
48
Mode A B C
276
288
D
Cb
DATACLK
EAV
1
Y Cr Y
EAV
2
EAV
3
EAV
4
SAV
1
SAV
2
SAV
3
SAV
4
Cb0 Y0 Cr0 Y1
0
HS Start
Horizontal Blanking
HS
HS Stop
A C
B
AVID
D
AVID Stop AVID Start
TVP5147M1
SLES140G –JULY 2005–REVISED FEBRUARY 2012 www.ti.com
NOTE: ITU-R BT.656 10-bit 4:2:2 timing with 2× pixel clock reference
Figure 2-14. Horizontal Synchronization Signals for 10-Bit 4:2:2 Mode
28 Functional Description Copyright © 2005–2012, Texas Instruments Incorporated
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