Datasheet

47
SLES084C − August 2007 TVP5146
2.11.31 CTI Delay Register
Subaddress 2Dh
Default 00h
7 6 5 4 3 2 1 0
Reserved CTI delay [2:0]
CTI delay [2:0]: Sets the delay of the Y channel with respect to Cb/Cr in the CTI block
011 = 3 pixel delay
001 = 1 pixel delay
000 = 0 delay (default)
111 = –1 pixel delay
100 = –4 pixel delay
2.11.32 CTI Control Register
Subaddress 2Eh
Default 00h
7 6 5 4 3 2 1 0
CTI coring [3:0] CTI gain [3:0]
CTI coring [3:0]: 4-bit CTI coring limit control value, unsigned linear control range from 0 to ±60,
step size = 4
1111 = ±60
0001 = ±4
0000 = 0 (default)
CTI gain [3:0]: 4-bit CTI gain control values, unsigned linear control range from 0 to 15/16, step
size = 1/16
1111 = 15/16
0001 = 1/16
0000 = 0 disabled (default)
2.11.33 RTC Register
Subaddress 31h
Default 05h
7 6 5 4 3 2 1 0
Reserved Genlock [2:0]
Genlock [2:0]:
000 = Reserved
001 = Reserved
010 = Reserved
011 = Reserved
100 = Reserved
101 = RTC mode
110 = Reserved
111 = Reserved