Datasheet

17
SLES084C − August 2007 TVP5146
For CbCr components, a saturation (gain) factor is applied to the CbCr inputs in order to map
them to the CbCr output code range and provide saturation control. Similarly, the limit block can
limit CbCr outputs to a valid range:
Cb,Cr
min
= 64 / Cb,Cr
max
= 960
x
Gain
CbCr
CbCr
Limit
Figure 2−17. CbCr Component Gain, Offset, Limit
2.2.5 Color Space Conversion
The formulas for RGB to YCbCr conversion are given as:
Y = 0.299 × R + 0.587 × G + 0.114 × B
Cb = –0.172 × R – 0.339 × G + 0.511 × B + 512
Cr = 0.511 × R – 0.428 × G – 0.083 × B + 512
2.3 Clock Circuits
An internal line-locked PLL generates the system and pixel clocks. A 14.31818-MHz clock is
required to drive the PLL. This can be input to the TVP5146 decoder at the 1.8-V level on
terminal 74 (XTAL1), or a crystal of 14.31818-MHz fundamental resonant frequency can be
connected across terminals 74 and 75 (XTAL2). If a parallel resonant circuit is used as shown in
Figure 2−18, then the external capacitors must have the following relationship:
C
L1
= C
L2
= 2C
L
– C
STRAY
,
where C
STRAY
is the terminal capacitance with respect to ground. Figure 2−18 shows the
reference clock configurations. The TVP5146 decoder generates the DATACLK signal used for
clocking data.
TVP5146
74
XTAL1
14.31818-MHz
Crystal
75
XTAL2
TVP5146
74
XTAL1
75
XTAL2
C
L1
C
L2
14.31818-MHz
Clock
Figure 2−18. Reference Clock Configurations
2.4 Real-Time Control (RTC)
Although the TVP5146 decoder is a line-locked system, the color burst information is used to
determine accurately the color subcarrier frequency and phase. This ensures proper operation
with nonstandard video signals that do not follow exactly the required frequency multiple
between color subcarrier frequency and video line frequency. The frequency control word of the
internal color subcarrier PLL and the subcarrier reset bit are transmitted via terminal 37 (GLCO)
for optional use in an end system (for example, by a video encoder). The frequency control word
is a 23-bit binary number.