Datasheet

9
SLES084C − August 2007 TVP5146
2 Functional Description
2.1 Analog Processing and A/D Converters
Figure 2−1 shows a functional diagram of the analog processors and ADCs. This block provides
the analog interface to all video inputs. It accepts up to 10 inputs and performs source selection,
video clamping, video amplification, A/D conversion, and gain and offset adjustments to center
the digitized video signal.
Clamp PGA
10-Bit
ADC
CH4 A/D
PGA
CH1 A/D
PGA
CH2 A/D
PGA
CH3 A/D
Line-Locked
Sampling Clock
TVP5146 Analog Front End
VI_4_A
M
U
X
VI_1_A
VI_1_B
VI_1_C
M
U
X
VI_2_A
VI_2_B
VI_2_C
M
U
X
VI_3_A
VI_3_B
VI_3_C
10-Bit
ADC
10-Bit
ADC
10-Bit
ADC
Clamp
Clamp
Clamp
Figure 2−1. Analog Processors and A/D Converters
2.1.1 Video Input Switch Control
The TVP5146 decoder has 4 analog channels that accept up to 10 video inputs. The user can
configure the internal analog video switches via the I
2
C interface. The 10 analog video inputs
can be used for different input configurations, some of which are:
• Up to 10 selectable individual composite video inputs
• Up to four selectable S-video inputs
• Up to three selectable analog YPbPr/RGB video inputs and one CVBS input
• Up to two selectable analog YPbPr/RGB video inputs, two S-video inputs, and two CVBS inputs
The input selection is performed by the input select register at I
2
C subaddress 00h (see Section
2.11.1).