Datasheet

TVP5146M2

www.ti.com

SLES141H –JULY 2005– REVISED FEBRUARY 2012

4 Example Register Settings

The following example register settings are provided only as a reference. These settings, given the

assumed input connector, video format, and output format, set up the TVP5146M2 decoder and provide

video output. Example register settings for other features and the VBI data processor are not provided

here.

4.1 Example 1

4.1.1 Assumptions

Input connector: Composite (VI_1_A) (default)

Video format: NTSC (J, M), PAL (B, G, H, I, N), or SECAM (default)

Note: NTSC-443, PAL-Nc, and PAL-M are masked from the autoswitch process by

default. See the autoswitch mask register at address 04h.

Output format: 10-bit ITU-R BT.656 with embedded syncs (default)

4.1.2 Recommended Settings

Recommended I

C writes: For the given assumptions, only one write is required. All other registers are set

up by default.

C register address 08h = Luminance processing control 3 register

C data 00h = Optimizes the trap filter selection for NTSC and PAL

C register address 0Eh = Chrominance processing control 2 register

C data 04h = Optimizes the chrominance filter selection for NTSC and PAL

C register address 34h = Output formatter 2 register

C data 11h = Enables YCbCr output and the clock output

Note: HS/CS, VS/VBLK, AVID, FID, and GLCO are logic inputs by default. See output formatter 3 and 4

registers at addresses 35h and 36h, respectively.

Submit Documentation Feedback

Product Folder Link(s): TVP5146M2