Datasheet

TVP5146M2
SLES141H –JULY 2005– REVISED FEBRUARY 2012 www.ti.com
Table 2-80. AGC Increment Speed Register
Subaddress 78h
Default 06h
7 6 5 4 3 2 1 0
Reserved AGC increment speed [2:0]
AGC increment speed [2:0]:
Adjusts gain increment speed.
111 = 7 (slowest)
110 = 6 (default)
⋮
000 = 0 (fastest)
Table 2-81. AGC Increment Delay Register
Subaddress 79h
Default 1Eh
7 6 5 4 3 2 1 0
AGC increment delay [7:0]
AGC increment delay:
Number of frames to delay gain increments
1111 1111 = 255
⋮
0001 1110 = 30 (default)
⋮
0000 0000 = 0
Table 2-82. Chip ID MSB Register
Subaddress 80h
Read only
7 6 5 4 3 2 1 0
CHIP ID MSB [7:0]
CHIP ID MSB [7:0]:
This register identifies the MSB of the device ID. Value = 51h
Table 2-83. Chip ID LSB Register
Subaddress 81h
Read only
7 6 5 4 3 2 1 0
CHIP ID LSB [7:0]
CHIP ID LSB [7:0]:
This register identifies the LSB of the device ID. Value = 46h
72 Functional Description Copyright © 2005–2012, Texas Instruments Incorporated
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