Datasheet

TVP5146M2
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SLES141H JULY 2005 REVISED FEBRUARY 2012
Table 2-14. AFE Gain Control Register
Subaddress 01h
Default 0Fh
7 6 5 4 3 2 1 0
Reserved 1 1 AGC chroma AGC luma
Bit 3: 1b must be written to this bit
Bit 2: 1b must be written to this bit
AGC chroma:
Controls automatic gain in the chroma/B/R/PbPr channel:
0 = Manual (if AGC luma is set to manual, AGC chroma is forced to be in manual)
1 = Enabled auto gain, applies a gain value acquired from the sync channel for S-Video and component mode. When AGC luma
is set, this state is valid (default).
AGC luma enable:
Controls automatic gain in the embedded sync channel of CVBS, S-Video, component video
0 = Manual gain, AFE coarse and fine gain frozen to the previous gain value set by AGC when this bit is set to 0.
1 = Enabled auto gain applied to only the embedded sync channel (default)
These settings affect only the analog front-end (AFE). The brightness and contrast controls are not affected by these settings.
Table 2-15. Video Standard Register
Subaddress 02h
Default 00h
7 6 5 4 3 2 1 0
Reserved Video standard [2:0]
With the autoswitch code running, the user can force the decoder to operate in a particular video standard mode by writing the appropriate
value into this register. Changing these bits causes the register settings to be reinitialized.
Video standard [2:0]:
CVBS and S-Video Component Video
000 Autoswitch mode (default) Autoswitch mode (default)
001 (M, J) NTSC Interlaced 525
010 (B, D, G, H, I, N) PAL Interlaced 625
011 (M) PAL Reserved
100 (Combination-N) PAL Reserved
101 NTSC 4.43 Reserved
110 SECAM Reserved
111 PAL 60 Reserved
Note: PAL 60 is not included in autoswitch mode.
Copyright © 20052012, Texas Instruments Incorporated Functional Description 43
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