Datasheet
TVP5146M2
SLES141H –JULY 2005– REVISED FEBRUARY 2012
www.ti.com
1.9 Terminal Functions
Table 1-1. Terminal Functions
TERMINAL
I/O DESCRIPTION
NAME NO.
Analog Video
VI_1_A 80
VI_1_B 1
VI_1_x: Analog video input for CVBS/Pb/B/C
VI_1_C 2
VI_2_x: Analog video input for CVBS/Y/G
VI_2_A 7
VI_3_x: Analog video input for CVBS/Pr/R/C
VI_4_A: Analog video input for CVBS/Y
VI_2_B 8
I Up to 10 composite, 4 S-video, and 2 composite or 3 component video inputs (or a combination
VI_2_C 9
thereof) can be supported.
The inputs must be ac coupled. The recommended coupling capacitor is 0.1 µF.
VI_3_A 16
The possible input configurations are listed in the input select register at I
2
C subaddress 00h (see
VI_3_B 17
Table 2-12).
VI_3_C 18
VI_4_A 23
Clock Signals
DATACLK 40 O Line-locked data output clock
External clock reference. It can be connected to an external oscillator with a 1.8-V compatible clock
XTAL1 74 I
signal or to a 14.31818-MHz crystal oscillator.
XTAL2 75 O External clock reference. Not connected if XTAL1 is driven by an external single-ended oscillator.
Digital Video
57, 58,
59, 60, Digital video output of CbCr, C_9 is MSB and C_0 is LSB. C_0 and C_[9-2] can be used as
C_[9:0]/GPIO 63, 64, O programmable general purpose I/O. C_1 (pin 69) requires an external pulldown resistor and should
65, 66, not be used for general purpose I/O.
69, 70
43, 44,
45, 46,
Digital video output of Y/YCbCr; Y_9 is MSB and Y_0 is LSB.
Y_[9:0] 47, 50, O
For the 8-bit mode, the two LSBs are ignored. Unused outputs can be left unconnected.
51, 52,
53, 54
Miscellaneous Signals
Fast-switch (blanking) input. Switching signal between the synchronous component video
FSS/GPIO 35 I/O (YPbPr/RGB) and the composite video input.
Programmable general-purpose I/O
Genlock control output (GLCO)
GLCO/I2CA 37 I/O
During reset, this terminal is an input used to program the I
2
C address LSB.
INTREQ 30 O Interrupt request
Power-down input:
PWDN 33 I 1 = Power down
0 = Normal mode
RESETB 34 I Reset, active low
Host Interface
SCL 28 I/O I
2
C clock
SDA 29 I/O I
2
C data bus
14 Introduction Copyright © 2005–2012, Texas Instruments Incorporated
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