Datasheet

USB SS
PHY
USB HS/FS
PHY
USB 3.0
Device
Controller
ARM
Cortex M3
ROM
RAM
64 kB
Watchdog Timer
Timer
SCI
(UART)
GPIO
PWM
SATA II
PHY
SATA
AHCI
SSTX+
SSTX-
DP/DM
SSRX+
SSRX-
SATATX+
SATATX-
S
A
T
A
R
X
+
S
A
T
A
R
X
-
U
artRX
GPIO
[11:0
]
SPI
S
C
L
K
D
A
T
A
_
O
U
T
DATA_IN
C
S
[2
:0
]
GRSTz
VDD3.3
VDD1.1
Power
and
Reset
Distribution
Clock
Generation
XI
X0
JTAG
TCK
TMS
TDO
TDI
TRST
Data Path
RAM
80 kB
USB_R1
USB_R1RTN
VBUS
Ua
rtTX
P
WM[1
:0]
TUSB9261
SLLSE67F –MARCH 2011–REVISED JULY 2013 www.ti.com
Figure 3-1. Device Block Diagram
8 INTRODUCTION Copyright © 2011–2013, Texas Instruments Incorporated
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