Datasheet

TUSB9261
SLLSE67F –MARCH 2011–REVISED JULY 2013 www.ti.com
6.3 Oscillator
XI should be tied to the 1.8-V clock source and XO should be left floating.
VSSOSC should be connected to the PCB ground plane.
A 20-, 25-, 30- or 40-MHz clock can be used.
Table 6-1. Oscillator Specification
PARAMETER CONDITIONS MIN TYP MAX UNIT
C
XI
XI input capacitance T
J
= 25°C 0.414 pF
V
IL
Low-level input voltage 0.7 V
V
IH
High-level input voltage 1.05 V
T
tosc_i
Frequency tolerance Operational temperature –50 50 ppm
T
duty
Duty cycle 45 50 55 %
T
R
/T
F
Rise/Fall time 20% - 80 % 6 ns
R
J
Reference clock R
J
JTF (1 sigma)
(1)(2)
0.8 ps
T
J
Reference clock T
J
JTF (total p-p)
(2)(3)
25 ps
T
p-p
Reference clock jitter (absolute p-p)
(4)
50 ps
(1) Sigma value assuming Gaussian distribution
(2) After application of JTF
(3) Calculated as 14.1 x R
J
+ D
J
(4) Absolute phase jitter (p-p)
6.4 Crystal
A parallel, 20-pF load capacitor should be used if a crystal source is used.
VSSOSC should not be connected to the PCB ground plane.
A 20-, 25-, 30- or 40-MHz crystal can be used.
Table 6-2. Crystal Specification
PARAMETER CONDITIONS MIN TYP MAX UNIT
Oscillation mode Fundamental
20
25
f
O
Oscillation frequency MHz
30
40
20 MHz and 25 MHz 50
ESR Equivalent series resistance 30 MHz 40 Ω
40 MHz 30
T
tosc_i
Frequency tolerance Operational temperature ±50 ppm
Frequency stability 1 year aging ±50 ppm
C
L
Load capacitance 12 20 24 pF
Crystal and board stray
C
SHUNT
4.5 pF
capacitance
Drive level (max) 0.8 mW
18 CLOCK CONNECTIONS Copyright © 2011–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TUSB9261