Datasheet

TUSB9261
SLLSE67F –MARCH 2011–REVISED JULY 2013 www.ti.com
Table 5-7. Power and Ground Signals
TERMINAL
I/O DESCRIPTION
PIN
NAME
NO.
1, 12,
19, 32,
33, 41,
VDD PWR 1.1-V power rail
47, 49,
55, 61,
63
7, 24,
VDD33 PWR 3.3-V power rail
51
34, 40,
VDDA33 PWR 3.3-V analog power rail
48, 62
Oscillator ground. If using a crystal, this should not be connected to PCB ground plane. If
VSSOSC 53 PWR using an oscillator, this should be connected to PCB ground. See the Clock Source
Requirements section for more details.
VSS 44, 58 PWR Ground
VSS 65 PWR Ground - Thermal Pad
NC 37, 64 — No connect, leave floating
16 SIGNAL DESCRIPTIONS Copyright © 2011–2013, Texas Instruments Incorporated
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