Datasheet

Not Recommended for New Designs
TUSB8040
SLLSE42I –SEPTEMBER 2010–REVISED SEPTEMBER 2013 www.ti.com
6.3 THERMAL INFORMATION
TUSB8040
THERMAL METRIC PFP UNITS
80 PINS
θ
JA
Junction-to-ambient thermal resistance
(1)
24.8
θ
JCtop
Junction-to-case (top) thermal resistance
(2)
21.5
θ
JB
Junction-to-board thermal resistance
(3)
8.37
°C/W
ψ
JT
Junction-to-top characterization parameter
(4)
0.5
ψ
JB
Junction-to-board characterization parameter
(5)
8.2
θ
JCbot
Junction-to-case (bottom) thermal resistance
(6)
1.6
(1) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(4) The junction-to-top characterization parameter, ψ
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(5) The junction-to-board characterization parameter, ψ
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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24 ELECTRICAL SPECIFICATIONS Copyright © 2010–2013, Texas Instruments Incorporated
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