Datasheet

Not Recommended for New Designs
TUSB8040
SLLSE42I –SEPTEMBER 2010–REVISED SEPTEMBER 2013 www.ti.com
Table 3-13. Bit Descriptions – Device Configuration Register (continued)
BIT FIELD NAME ACCESS DESCRIPTION
U1 U2 Disable
When this bit is set, the TUSB8040 will not initiate or accept any U1 or U2 requests on any
port, upstream or downstream, unless it receives or sends a Force_LinkPM_Accept LMP
command. After receiving or sending a FLPMA LMP command, the TUSB8040 will
continue to enable U1 or U2 until it gets a power on reset or is disconnected on its
5 u1u2Disable RW
upstream port.
This bit is loaded at the deassertion of reset with the value of the SDA_SMDAT terminal.
When the TUSB8040 is in I
2
C mode, the TUSB8040 loads this bit from the contents of the
EEPROM.
When the TUSB8040 is in SMBUS mode, the value may be over-written by a SMBUS host.
Port Indicator Status.
For the TUSB8040PFP: This bit shall be 1. It shall not be over-written by EEPROM or an
SMBus host.
4 portIndz RW
When the TUSB8040 is in I
2
C mode, the TUSB8040 loads this bit from the contents of the
EEPROM.
When the TUSB8040 is in SMBUS mode, the value may be overwritten by an SMBus host.
Ganged. This bit is always 1.
For the TUSB8040PFP: This bit shall be 1. It shall not be over-written by EEPROM or an
SMBus host.
3 ganged RW
When the TUSB8040 is in I
2
C mode, the TUSB8040 loads this bit from the contents of the
EEPROM.
When the TUSB8040 is in SMBUS mode, the value may be overwritten by an SMBus host.
Full Power Management. This bit is loaded at the de-assertion of reset with the value of the
FULLPWRMGMTz_SMBA1 terminal.
2 fullPwrMgmtz RW When the TUSB8040 is in I
2
C mode, the TUSB8040 loads this bit from the contents of the
EEPROM.
When the TUSB8040 is in SMBUS mode, the value may be over-written by an SMBus host.
1:0 RSVD RO Reserved. This field is reserved and returns 0 when read.
3.3.7 Battery Charging Support Register
Table 3-14. Register Offset 6h
BIT NO. 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 X X X X
Table 3-15. Bit Descriptions – Battery Charging Support Register
BIT FIELD NAME ACCESS DESCRIPTION
7:4 RSVD RO Reserved. Read only, returns 0 when read.
Battery Charger Support. The bits in this field indicate whether the downstream port
implements the charging port features. A value of 0 indicates the port does not implement
the charging port features. A value of 1 indicates the port does support the charging port
features.
Each bit corresponds directly to a downstream port, i.e. batEn0 corresponds to downstream
port 0.
3:0 batEn[3:0] RW When in I
2
C/SMBus mode the bits in this field corresponding to the enabled ports per
used[3:0] may be over-written by EEPROM contents or by an SMBus host.
For the TUSB8040PFP:
The default value for these bits are loaded at the de-assertion of reset with the value of the
PWRON0z_BATEN0:
Four-port hub - bateEn[3:0] defaults to wxyzb,
where w, x, y and z are all the value of PWRON0z_BATEN0.
16 FUNCTIONAL DESCRIPTION Copyright © 2010–2013, Texas Instruments Incorporated
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