Datasheet

TUSB8040A
SLLSEA7F –MAY 2012–REVISED SEPTEMBER 2013 www.ti.com
2.6 Test and Miscellaneous Signals
Table 2-6. Test and Miscellaneous Signals
PIN
SIGNAL NAME TYPE DESCRIPTION
NO.
JTAG_TCK I/O, PD B13 JTAG test clock. Can be left unconnected.
JTAG_TDI I/O, PU B15 JTAG test data in. Can be left unconnected.
JTAG_TDO I/O, PD A15 JTAG test data out. Can be left unconnected.
JTAG_TMS I/O, PU B14 JTAG test mode select. Can be left unconnected.
JTAG_RSTz I/O, PD A16 JTAG reset. Pull down using an external 1-kΩ resistor for normal operation.
High-speed suspend status output.
0 = High-speed upstream port not suspended
1= High-speed upstream port suspended
HS_SUSPEND I/O, PD B11
The value of the terminal is sampled at the deassertion of reset to determine the polarity of
the PWRONxz_BATENx pins. If it is sampled as a ‘0’ (default), the polarity is active low. If it
is sampled as a ‘1’, the polarity is active high.
Can be left unconnected.
SuperSpeed USB suspend status output.
0 = SuperSpeed USB upstream port not suspended
1= SuperSpeed USB upstream port suspended
SS_SUSPEND I/O, PD A13
The value of the terminal is sampled at the deassertion of reset to determine if spread
spectrum clocking is enabled or disabled. If it is sampled as a ‘0’ (default), SSC is enabled.
If it is sampled as a ‘1’, SSC is disabled.
Can be left unconnected.
High-speed status. The terminal is to indicate the connection status of the upstream port as
documented below:
0 = Hub in low/full speed mode
HS O A11
1 = Hub in high-speed mode
Can be left unconnected.
SuperSpeed USB status. The terminal is to indicate the connection status of the upstream
port as documented below:
0 = Hub not in SuperSpeed USB mode
SS O A12
1 = Hub in SuperSpeed USB mode
Can be left unconnected.
Full power management enable/SMBus address bit 1.
The value of the terminal is sampled at the de-assertion of reset to set the power switch
control follows:
0 = Full power management supported
1 = Full Power management not supported
FULLPWRMGMTz_SMB
I, PU A17
A1
Full power management is the ability to control power to the downstream ports of the
TUSB8040 using the PWRON0z_BATEN0 terminal. When SMBus mode is enabled using
SMBUSz, this terminal sets the value of the SMBus slave address bit 1. SMBus slave
address bits 2 and 3 are always 1 for the TUSB8040. When SMBus mode is enabled using
SMBUSz, this terminal sets the value of the SMBus slave address bit 1.
Can be left unconnected if full power management and SMBus are not implemented.
Ganged operation enable/SMBus Address bit 2.
The value of the terminal is sampled at the deassertion of reset to set the power switch and
over current detection mode as follows:
GANGED_SMBA2 I, PU A41 0 = Power indicator LEDs are enabled
1 = Power indicator LEDs are NOT enabled
When SMBus mode is enabled using SMBUSz, this terminal sets the value of the SMBus
slave address bit 3.
14 PIN DESCRIPTIONS Copyright © 2012–2013, Texas Instruments Incorporated
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