Datasheet

TUSB7320, TUSB7340
www.ti.com SLLSE76E–MARCH 2011– REVISED JULY 2011
Table 6-49. Event Ring Segment Table Base Address Register Description
Bit Field Name Access Description
63:4 ERST_BASE rw Event Ring Segment Table Base Address.
3:0 RSVD r Reserved. Returns zeros when read.
6.4.6 Event Ring Dequeue Pointer Register
The TUSB73X0 implements 8 Event Ring Dequeue Pointer Registers, one for each Interrupter
implemented.
Runtime Base register offset:38h + (20h*Interrupter), where Interrupter = 0 through 7
Register type:Read/Write, Read/Clear
Default value: 0000 0000 0000 0000h
Table 6-50. HC Runtime Register (Runtime Base + 38h + (20h*Interrupter)),
where Interrupter = 0 through 7
Bit
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Table 6-51. Event Ring Dequeue Pointer Register Description
Bit Field Name Access Description
64:4 ERDP rw Event Ring Dequeue Pointer.
3 EHB rc Event Handler Busy.
2:0 DESI rw Dequeue ERST Segment Index.
Copyright © 2011, Texas Instruments Incorporated xHCI MEMORY MAPPED REGISTER SPACE 91
Submit Documentation Feedback
Product Folder Link(s): TUSB7320 TUSB7340