Datasheet

TUSB7320, TUSB7340
www.ti.com
SLLSE76EMARCH 2011 REVISED JULY 2011
6.3.8 Configure Register
This register defines runtime xHC configuration parameters.
Operational Base register offset:38h
Register type:Read-Only, Read/Write
Default value: 0000 0000h
Table 6-29. HC Operational Register (Operational Base + 38h)
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Table 6-30. Configure Register Description
Bit Field Name Access Description
31:8 RSVD r Reserved. Returns zeros when read.
7:0 MAX_SLOTS_EN rw Max Device Slots Enabled.
6.3.9 Port Status and Control Register
The TUSB73X0 implements a Port Status and Control Register for each port that is implemented. The
number of Port Status and Control Registers is the same as the value in the MAX_PORTS field in the
Host Controller Structural Parameters 1 Register (see 6.1.3).
Operational Base register offset:400h + (10h*(n-1))), where n = Port Number
Register type:Read-Only, Read/Write, Read/Clear
Default value: X000 02A0h
Table 6-31. HC Operational Register (Operational Base + 400h + (10h*(n-1))), where n = Port Number
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 x 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0
State
Table 6-32. Port Status and Control Register Description
Bit Field Name Access Description
Warm Port Reset. This field is only valid for USB 3.0 protocol ports. For
31 WPR * rc or r
USB 2.0 protocol ports, this bit is reserved.
Device Removable. The value of this bit depends on the value
programmed into the USBx_PORTy_NON_REM bit in the USB Control
30 DR r
Register that corresponds to the port number and port type associated
with this register.
29:28 RSVD r Reserved. Returns zeros when read.
27 WOE * rw Wake on Over-current Enable.
Copyright © 2011, Texas Instruments Incorporated xHCI MEMORY MAPPED REGISTER SPACE 85
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