Datasheet

TUSB7320, TUSB7340
SLLSE76EMARCH 2011 REVISED JULY 2011
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Table 4-32. Power Management Capabilities Register Description (continued)
Device Specific Initialization. This bit returns 0 when read, indicating that
5 DSI r the TUSB73X0 does not require special initialization beyond the standard
PCI configuration header before a generic class driver is able to use it.
4 RSVD r Reserved. Returns zero when read.
3 PME_CLK r PME# Clock.
Power Mgmt Version. This field returns 3b011 indicating Rev 1.2
2:0 PM_VERSION r
compatibility.
4.25 Power Management Control/Status Register
This register determines and changes the current power state of the TUSB73X0.
PCI register offset: 44h
Register type:Read/Write, Read-only
Default value: 0008h
Table 4-33. PCI Register 44h
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
State
Table 4-34. Power Management Control/Status Register Description
Bit Field Name Access Description
15 PME_STAT rc PME# Status. This bit is sticky and is only reset by a Global Reset.
Data Scale. This 2-bit field returns 0s when read since the TUSB73X0
14:13 DATA_SCALE r
does not use the Data Register.
Data Select. This 4-bit field returns 0s when read since the
12:9 DATA_SEL r
TUSB73X0 does not use the Data Register.
8 PME_EN rw PME# Enable. This bit is sticky and is only reset by a Global Reset.
7:4 RSVD r Reserved. Returns zero when read.
No Soft Reset. This bit returns 1 indicating that no internal reset is
3 NO_SOFT_RESET r generated and the device retains its configuration context when
transitioning from the D3hot state to the D0 state.
2 RSVD r Reserved. Returns zero when read.
Power State. This 2-bit field is used both to determine the current
power state of the function and to set the function into a new power
1:0 PWR_STATE rw
state. This field is encoded as follows:00 = D001 = D110 = D211 =
D3hot.
4.26 Power Management Bridge Support Extension Register
This read-only register is not applicable to the TUSB73X0 and returns 00h when read.
PCI register offset: 46h
Register type:Read-only
Default value: 00h
Table 4-35. PCI Register 46h
Bit No. 7 6 5 4 3 2 1 0
Reset State 0 0 0 0 0 0 0 0
40 CLASSIC PCI CONFIGURATION SPACE Copyright © 2011, Texas Instruments Incorporated
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Product Folder Link(s): TUSB7320 TUSB7340