Datasheet

TUSB7320, TUSB7340
SLLSE76E–MARCH 2011– REVISED JULY 2011 www.ti.com
Table 6-26. Command Ring Control Register Description
Bit Field Name Access Description
31:6 COM_RING_POINT rw Command Ring Pointer.
5:4 RSVD r Reserved. Returns zeros when read.
3 CRR r Command Ring Running.
2 CA rw Command Abort.
1 CS rw Command Stop.
0 RCS rw Ring Cycle State.
6.3.7 Device Context Base Address Array Pointer Register
This 64-bit register identifies the base address of the Device Context Base Address Array.
Operational Base register offset:30h
Register type:Read-Only, Read/Write
Default value: 0000 0000 0000 0000h
Table 6-27. HC Operational Register (Operational Base + 30h)
Bit
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Table 6-28. Device Context Base Address Array Pointer Register Description
Bit Field Name Access Description
31:6 DCBAAP rw Device Context Base Address Array Pointer.
5:0 RSVD r Reserved. Returns zeros when read.
84 xHCI MEMORY MAPPED REGISTER SPACE Copyright © 2011, Texas Instruments Incorporated
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Product Folder Link(s): TUSB7320 TUSB7340