Datasheet

TUSB7320, TUSB7340
www.ti.com SLLSE76E–MARCH 2011– REVISED JULY 2011
4.11 Base Address Register 0
This register is used to program the memory address used to access the device control registers.
PCI register offset: 10h
Register type:Read/Write,Read-only
Default value: 0000 0004h
Table 4-14. PCI Register 10h
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
State
Table 4-15. Base Address Register 0 Description
Bit Field Name Access Description
Memory Address. The lower 32 bits of the 64-bit memory address field for
31:16 ADDRESS rw the TUSB73X0. The TUSB73X0 uses 16 read/write bits indicating that 64
kB of memory space is required.
15:4 RSVD r Reserved. These bits are read-only and return zeros when read.
Pre-fetchable. This bit is read only 0 indicating that this memory window is
3 PRE_FETCH r
not prefetchable.
Memory Type. This field is read only 10b indicating that this window can
2:1 MEM_TYPE r
be located anywhere in the 64-bit address space.
Memory Space Indicator. This field returns 0 indicating that memory space
0 MEM_IND r
is used.
4.12 Base Address Register 1
This register is used to program the memory address used to access the device control registers.
PCI register offset: 14h
Register type:Read/Write
Default value: 0000 0000h
Table 4-16. PCI Register 14h
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Table 4-17. Base Address Register 1 Description
Bit Field Name Access Description
Memory Address. T his field indicates the upper 32 bits of the 64-bit
31:0 ADDRESS rw
memory address for the TUSB73X0.
Copyright © 2011, Texas Instruments Incorporated CLASSIC PCI CONFIGURATION SPACE 35
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Product Folder Link(s): TUSB7320 TUSB7340