Datasheet

TUSB7320, TUSB7340
SLLSE76E–MARCH 2011– REVISED JULY 2011 www.ti.com
Table 6-38. Port Link Info Register Description
Bit Field Name Access Description
31:16 RSVD r Reserved. Returns zeros when read.
15:0 LINK_ERROR_COUNT r Link Error Count.
6.4 Host Controller Runtime Registers
These registers are used to read the current microframe and to control the interrupters of the TUSB73X0.
The offset in Table 6-39 is from the Runtime Base, which is the address programmed into the Base
Address Register 0 plus the value programmed into the Runtime Register Space Offset (see
Section 6.2.8).
Table 6-39. Host Controller Runtime Register Map
Register Name Offset
Microframe Index 00h
Reserved 04h-1Fh
Interrupter Register Set 0 20h-3Fh
Interrupter Register Set 1 40h-5Fh
Interrupter Register Set 2 60h-7Fh
Interrupter Register Set 3 80h-9Fh
Interrupter Register Set 4 A0h-BFh
Interrupter Register Set 5 C0h-DFh
Interrupter Register Set 6 E0h-FFh
Interrupter Register Set 7 100h-11Fh
6.4.1 Microframe Index Register
This register is used by the system software to determine the current periodic frame. The register value is
incremented every 125 microseconds.
Runtime Base register offset:00h
Register type:Read-Only
Default value: 0000 0000h
Table 6-40. HC Runtime Register (Runtime Base + 00h)
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Table 6-41. Microframe Index Register Description
Bit Field Name Access Description
31:14 RSVD r Reserved. Returns zeros when read.
13:0 MICROFRAME_IDX r Microframe Index.
88 xHCI MEMORY MAPPED REGISTER SPACE Copyright © 2011, Texas Instruments Incorporated
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