Datasheet

TUSB7320, TUSB7340
www.ti.com SLLSE76E–MARCH 2011– REVISED JULY 2011
6.3.2 USB Command Register
This register indicates the command to be executed by the TUSB73X0.
Operational Base register offset:00h
Register type:Read-Only,Read/Write
Default value: 0000 0000h
Table 6-17. HC Operational Register (Operational Base + 00h)
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Table 6-18. USB Command Register Description
Bit Field Name Access Description
31:12 RSVD r Reserved. Returns zeros when read.
11 EU3S rw Enable U3 MFINDEX Stop
10 EWE rw Enable Wrap Event
9 CRS rw Controller Restore State
8 CSS rw Controller Save State
7 LHCRST rw Light Host Controller Reset
6:4 RSVD r Reserved. Returns zeros when read.
3 HSEE rw Host System Error Enable
2 INTE rw Interrupter Enable
1 HCRST rw Host Controller Reset
0 R/S rw Run/Stop.
6.3.3 USB Status Register
This register indicates pending interrupts and various states of the TUSB73X0.
Operational Base register offset:04h
Register type:Read-Only, Read/Clear
Default value: 0000 0801h
Table 6-19. HC Operational Register (Operational Base + 04h)
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1
State
Copyright © 2011, Texas Instruments Incorporated xHCI MEMORY MAPPED REGISTER SPACE 81
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Product Folder Link(s): TUSB7320 TUSB7340