Datasheet

TUSB7320, TUSB7340
www.ti.com SLLSE76E–MARCH 2011– REVISED JULY 2011
Table 6-12. HC Capability Parameters Description (continued)
64-bit Addressing Capability. This bit is ‘1’ to indicate that the TUSB73X0
0 AC64 r
implements 64-bit address memory pointers.
6.2.7 Doorbell Offset
This read only register returns 0000 05C0h when read to indicate that the beginning of the Doorbell Array
is at an offset of 5C0h from the address programmed into the Base Address Register 0.
BAR0 register offset: 14h
Register type:Read-Only
Default value: 0000 05C0h
Table 6-13. HC Capability Register 14h
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0
State
6.2.8 Runtime Register Space Offset
This read only register returns 0000 04A0h when read to indicate that the beginning of the Runtime
Register Space is at an offset of 4A0h from the address programmed into the Base Address Register 0.
BAR0 register offset: 18h
Register type:Read-Only
Default value: 0000 04A0h
Table 6-14. HC Capability Register 18h
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
No.
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
State
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
Reset
0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0
State
Copyright © 2011, Texas Instruments Incorporated xHCI MEMORY MAPPED REGISTER SPACE 79
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Product Folder Link(s): TUSB7320 TUSB7340