Datasheet

TUSB7320, TUSB7340
www.ti.com SLLSE76E–MARCH 2011– REVISED JULY 2011
Table 2-4. USB Downstream Signals
TERMINAL
I/O DESCRIPTION
TUSB7320 TUSB7340
NAME
PIN NO. PIN NO.
USB SuperSpeed transmitter differential pair (positive).
USB_SSTXP_
A17 A17 O Note: When routing, it is permissible to swap the positive and negative signals in Port 1
DN1
SSTX differential pair.
USB_SSTXN_ USB SuperSpeed transmitter differential pair (negative).
DN1 B15 B15 O Note: When routing, it is permissible to swap the positive and negative signals in Port 1
SSTX differential pair.
USB SuperSpeed receiver differential pair (positive).
USB_SSRXP_
A18 A18 I Note: When routing, it is permissible to swap the positive and negative signals in Port 1
DN1
SSRX differential pair.
USB SuperSpeed receiver differential pair (negative).
USB_SSRXN_
B16 B16 I Note: When routing, it is permissible to swap the positive and negative signals in Port 1
DN1
SSRX differential pair.
USB_DP_DN1 A20 A20 I/O USB High-speed differential transceiver (positive).
USB_DM_DN1 B18 B18 I/O USB High-speed differential transceiver (negative).
USB DS Port 1 Power On Control for Downstream Power. The terminal is used for
O control of the downstream power switch. If the PWRON_POLARITY bit is set to ‘1’, this
PWRON1# B33 B33
PD pin is active high and the internal pull-down is disabled. This pin may be at low
impedance when power rails are removed.
USB DS Port 1 Over-Current Detection.
I
OVERCUR1# A36 A36 0: over-current detected;
PU
1: over-current not detected
USB SuperSpeed transmitter differential pair (positive).
USB_SSTXP_
A11 A11 O Note: When routing, it is permissible to swap the positive and negative signals in Port 2
DN2
SSTX differential pair.
USB SuperSpeed transmitter differential pair (negative).
USB_SSTXN_
B10 B10 O Note: When routing, it is permissible to swap the positive and negative signals in Port 2
DN2
SSTX differential pair.
USB SuperSpeed receiver differential pair (positive).
USB_SSRXP_
B9 B9 I Note: When routing, it is permissible to swap the positive and negative signals in Port 2
DN2
SSRX differential pair.
USB SuperSpeed receiver differential pair (negative).
USB_SSRXN_
A10 A10 I Note: When routing, it is permissible to swap the positive and negative signals in Port 2
DN2
SSRX differential pair.
USB_DP_DN2 B12 B12 I/O USB High-speed differential transceiver (positive).
USB_DM_DN2 A13 A13 I/O USB High-speed differential transceiver (negative).
USB DS Port 2 Power On Control for Downstream Power. The terminal is used for
O control of the downstream power switch. If the PWRON_POLARITY bit is set to ‘1’, this
PWRON2# B34 B34
PD pin is active high and the internal pull-down is disabled. This pin may be at low
impedance when power rails are removed.
USB DS Port 2 Over-Current Detection.
I
OVERCUR2# A37 A37 0: over-current detected;
PU
1: over-current not detected
USB SuperSpeed transmitter differential pair (positive).
USB_SSTXP_
N/A B28 O Note: When routing, it is permissible to swap the positive and negative signals in Port 3
DN3
SSTX differential pair.
USB SuperSpeed transmitter differential pair (negative).
USB_SSTXN_
N/A A30 O Note: When routing, it is permissible to swap the positive and negative signals in Port 3
DN3
SSTX differential pair.
USB SuperSpeed receiver differential pair (positive).
USB_SSRXP_
N/A B27 I Note: When routing, it is permissible to swap the positive and negative signals in Port 3
DN3
SSRX differential pair.
USB SuperSpeed receiver differential pair (negative).
USB_SSRXN_
N/A A29 I Note: When routing, it is permissible to swap the positive and negative signals in Port 3
DN3
SSRX differential pair.
USB_DP_DN3 N/A B25 I/O USB High-speed differential transceiver (positive).
USB_DM_DN3 N/A A27 I/O USB High-speed differential transceiver (negative).
Copyright © 2011, Texas Instruments Incorporated OVERVIEW 19
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