Datasheet

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ATA/ATAPI Interface Port

11−8

SLLS535E − March 2008TUSB6250

11.4 ATA/ATAPI Group 0 (Task_File) Registers

Table 11−1. Task_File Registers (Group 0)

MMR

ADDRESS

OFFSET ADDRESS

(BASE ADDRESS = F0C0)

F0C0 00h Task_File0 register

F0C1 01h Task_File1 register

F0C2 02h Task_File2 register

F0C3 03h Task_File3 register

F0C4 04h Task_File4 register

F0C5 05h Task_File5 register

F0C6 06h Task_File6 register

F0C7 07h Task_File7 register

F0C8 08h Task_File8 register

F0C9 09h Task_File9 register

F0CA 0Ah Task_File10 register

F0CB 0Bh Task_File11 register

F0CC 0C Task_File12 register

F0CD 0Dh Task_File13 register

F0CE 0Eh Task_File14 register

F0CF 0Fh Task_File15 register

The Task_File0 to Task_File15 registers are used to send ATA/ATAPI commands and command-required

parameters to the ATA/ATAPI interface. The MCU performs read and write operations to these Task_File

registers. This group of registers is only used in the fully automatic mode that is described in Section 11.3. In

the fully automatic mode, the ATA/ATAPI controller is responsible to perform transfer writes in the command

stage of a given CBW. The firmware must set the AUTO_CMD bit in the ATPIFCNFG1 register to enable this

automatic command transfer feature.

• If the AUTO_CMD bit is set and the external storage device is an ATA device:

The MCU starts the command execution with the transaction state machine of the TUSB6250 ATA/ATAPI

controller writing the following Task_File registers to their corresponding ATA registers (called command

block registers) in the ATA device with the fixed sequence:

1. Task_File6 → Device/head register

2. Task_File1 → Feature register

3. Task_File2 → Sector count register

4. Task_File3 → Sector number register

5. Task_File4 → Cylinder low register

6. Task_File5 → Cylinder high register

7. Task_File7 → Command register

Once the write to these command block registers is done, if the command is not a nondata command, the

TUSB6250ATA/ATAPI controller prepares the data transfer.

• If the AUTO_CMD bit is set and the external storage device is an ATAPI device:

The MCU starts the command execution with the transaction state machine of the ATA/ATAPI controller

first sending the packet command (command code A0h with DEV bit set to the value of DEV_SEL), then

transferring command packets to the data register with 16-bit data (Task_File1, Task_File0), (Task_File3,

Task_File2) ,etc., up to command_length. If command_length is an odd number, it is rounded to an even

number. The maximum number of command_length is 16 bytes. Once writing a command packet to the

device is complete, if the ATAPI command is not a nondata command, the ATA/ATAPI controller prepares

the data transfer.