Datasheet

ATA/ATAPI Interface Port
11−4
SLLS535E − March 2008TUSB6250
11.2 ATA/ATAPI Port Power-On Sequencing and 3-State Control
As described in Section 5.3.1, Unique Power-On Sequencing to the Storage Device, the TUSB6250 offers
unique power-on sequencing features, which provides design flexibility to the drive developers, especially if
multiple devices share the ATA/ATAPI bus. Unlike other USB-to-ATA/ATAPI bridge controllers, the TUSB6250
powers up with its ATA/ATAPI interface totally disabled and with its output buffers in the high-impedance state.
The internal pulldown resistors are also enabled by default after the power-up reset. Once the firmware is
loaded into the code RAM, it then has the control to enable the ATA/ATAPI bus and reconfigure all the GPIOs
along with the pullup and pulldown resistors at any time required by the application.
Another key feature of the TUSB6250 is that it allows the firmware to disable the entire ATA/ATAPI bus and
put it into the high-impedance state during normal operation, simply by setting the ATP_DIS bit in the
CMNDLNGTH (command length) register. To reenable the interface, the firmware must clear the ATP_DIS
bit. The TUSB6250 also provides pullup and/or pulldown resistors on most of its ATA/ATAPI interface pins,
which sets it apart from other mass-storage controller chips.
The advantages of the above features are as follows:
The ATA/ATAPI interface powering up in the high-impedance state enables the end-product application
to meet the critical 100-mA bus-power current consumption limit required by the USB 2.0 specification.
Otherwise, if a hard-disk drive is powered up and performs a start-up disk spin-up at the same time, while
the TUSB6250 is powering up, the surge current is likely to exceed 100 mA.
This also protects the mass-storage device connected to the TUSB6250 ATA/ATAPI interface from
damage, if the mass-storage device is not equipped with fail-safe I/O buffers.
The firmware controllable 3-state feature allows the TUSB6250 to share the ATA/ATAPI bus with another
TI DSP or microcontroller implemented on the same end-product PCB.
The ATA/ATAPI bus 3-state control feature can also be implemented based on an external event. For example,
if an onboard DSP shares the same ATA/ATAPI bus with the TUSB6250 in a portable digital audio player
application, the end product could use the remote-wakeup-capable P3.5 pin as an ATA/ATAPI bus-request
signal to alert the TUSB6250 when the DSP needs the ATA/ATAPI bus. The TUSB6250, under flexible
firmware control, finishes the current data-transferring task it is performing and then grants the ATA/ATAPI bus
to the DSP. Vise versa, the TUSB6250 can also use another GPIO as the bus-request signal to alert the DSP
when it needs the ATA/ATAPI bus. With the many GPIOs the TUSB6250 offers, flexible handshake functions
between the two on-board controllers are easily accomplished.
Figure 11−3 illustrates the power up and reset sequences for the TUSB6250 ATA/ATAPI interface.