Datasheet

ATA/ATAPI Interface Port
11−1
SLLS535E − March 2008 TUSB6250
11 ATA/ATAPI Interface Port
The ATA/ATAPI controller embedded in the TUSB6250 acts as a bridge between the device USB interface and
ATA/ATAPI interface. A high-performance DMA engine is implemented in the ATA/ATAPI controller to move
data automatically between the TUSB6250 sector FIFO and the ATA/ATAPI interface port where the external
ATA/ATAPI mass storage device is connected.
Unlike other state-machine-based USB 2.0 ATA/ATAPI mass storage bridge controllers on the market, the
TUSB6250 offers both the performance achieved by using a DMA state machine, and the flexibility provided
through the MCU and firmware control.
Figure 11−1 illustrates the data flow between the TUSB6250 USB interface and a mass storage device (for
example, a hard disk drive) connected to the controller ATA/ATAPI port. Figure 11−2 illustrates all major blocks
in the ATA/ATAPI controller. The TUSB6250 supports the USB mass storage class bulk-only transport
protocol, which consists of three stages for each data transfer: command, data, and status.
• In the command stage, the host commands to the drive are processed by the MCU. The commands issued
by the USB host are transferred through the USB bulk pipe to the addressed USB bulk endpoint. The MCU
dispatches the commands to the proper ATA/ATAPI registers.
• In the data stage, the TUSB6250 allows data to be transferred:
− Manually by firmware. As such, the data movement between the upstream USB interface and the 4K
byte EDB is processed by the UBM. However, the data between the 4K-byte EDB and the ATA/ATAPI
interface is processed by the MCU.
− Automatically by the DMA engine in the ATA/ATAPI controller. As such, the UBM moves the data
between the upstream USB interface and the sector FIFO. Then, the data is automatically moved
between the sector FIFO and the ATA/ATAPI interface by the DMA engine without MCU intervention.
• In the status stage, when a command is terminated, the ATA/ATAPI controller interrupts the MCU with
command completion or error information. The MCU then performs reads from the ATA/ATAPI drive status
registers and reports back to the USB host via the addressed USB bulk-in endpoint.
Note that the sector data transfer is a half-duplex operation. The dotted line between the MCU and the sector
FIFO in the diagram indicates that the MCU can only access the sector FIFO indirectly by using the MCU
access address and data registers defined in the ATA/ATAPI group-2 register section.
USB
8K/24K/32K-Byte
Size-Configurable
Sector FIFO RAM
UBM
ATA/ATAPI
Controller
State Machine
and DMA Engine
IDE
MCU
4K-Byte
EDB
Figure 11−1. ATA/ATAPI-Port Data Flow Diagram