Datasheet

Miscellaneous and GPIO Configuration Registers
9−6
SLLS535E − April 2008TUSB6250
9.6 PUPDFUNC: Pullup/Pulldown Configuration Register for Functional Pins (XDATA
at F08E)
The PUPDFUNC register allows the MCU to select/deselect and enable/disable the internal pullup or pulldown
resistor connection on certain functional pins.
76543210
PDATPDD7 PDVBUS PDATPDAT PDDMARQ POFFIORDY PUSLIORDY POFFINTRQ PUSLINTRQ
R/W R/W R/W R/W R/W R/W R/W R/W
BIT
NAME RESET FUNCTION
0 PUSLINTRQ 0 INTRQ pin pullup/pulldown resistor selection configuration by the MCU.
If the MCU sets this bit to 1, the pullup resistor is selected and the pulldown resistor is
deselected.
If the MCU clears this bit to 0, the pulldown resistor is selected and the pullup resistor is
deselected.
The power-up default is the pulldown resistor enabled and the pullup resistor disabled for the
INTRQ pin.
1 POFFINTRQ 0 INTRQ pin pullup/pulldown resistor power-down configuration by the MCU.
If the MCU sets this bit to 1, both the pullup and pulldown resistors are disabled.
If the MCU clears this bit to 0, either the pullup or the pulldown resistor is enabled for the
INTRQ pin, with the selection controlled by the PUSLINTRQ bit.
2 PUSLIORDY 0 IORDY pin pullup/pulldown resistor selection configuration by the MCU.
If the MCU sets this bit to 1, the pullup resistor is selected and the pulldown resistor is
deselected.
If the MCU clears this bit to 0, the pulldown resistor is selected and the pullup resistor is
deselected.
The power-up default is the pulldown enabled and the pullup disabled for the IORDY pin. The
MCU must enable the pullup on the IORDY pin during normal operation.
3 POFFIORDY 0 IORDY pin pullup/pulldown resistor power-down configuration by the MCU.
If the MCU sets this bit to 1, both the pullup and pulldown resistors are disabled.
If the MCU clears this bit to 0, either the pullup or the pulldown resistor is enabled for the
IORDY pin, with the selection controlled by the PUSLIORDY bit.
4 PDDMARQ 0 DMARQ pin pulldown resistor enable/disable configuration by the MCU.
If the MCU sets this bit to 1, the pulldown resistor is disconnected from the pin.
If the MCU clears this bit to 0, the pulldown resistor is connected to the pin.
5 PDATPDAT 0 ATAPI data bus (DD15−DD8, DD6−DD0) pin pulldown resistor enable/disable configuration by
the MCU. The DD7 pin has its own pulldown resistor control (PDATPDD7), as described in bit 7
of this register.
If the MCU sets this bit to 1, the pulldown resistors are disconnected from the 16-bit data bus
(except DD7).
If the MCU clears this bit to 0, the pulldown resistors are connected to the 16-bit data bus
(except DD7).
6 PDVBUS 0 VBUS pin pulldown resistor enable/disable configuration by the MCU. Before getting into
suspend, the firmware checsk the VBUS status and turns off the pulldown resistor if VBUS is
active.
If the MCU sets this bit to 1, the pulldown resistor is disconnected from the pin.
If the MCU clears this bit to 0, the pulldown resistor is connected to the pin.
7 PDATPDD7 0 ATAPI data bus DD7 pin pulldown resistor enable/disable configuration by the MCU. The
pulldown resistor control for the other ATA/ATAPI data bus pins is defined in bit 5 (PDATPDAT)
of this register.
If the MCU sets this bit to 1, the pulldown resistor is disconnected from the DD7 pin.
If the MCU clears this bit to 0, the pulldown resistor is connected to the DD7 pin.
The power-up default is the pulldown resistor enabled for the DD7 pin.