Datasheet

Miscellaneous and GPIO Configuration Registers
9−4
SLLS535E − April 2008TUSB6250
9.3 PUPDWDN_P2: GPIO Pullup and Pulldown Resistor Power-Down Register for
Port 2 (XDATA at F08B)
The PUPDWDN_P2 register allows the MCU to enable/disable both the internal pullup/pulldown resistors
connected to port 2 GPIO pins. To choose the desired pullup or pulldown resistor for a particular pin, the MCU
must ensure the correct setup is done in the PUPDSLCT_P2 register before enabling the corresponding bit
in the PUPDWDN_2 register.
PUPDOFF[N] means the pullup/pulldown resistors disable or power down for the P2.N pin.
76543210
PUOFF7 PUPDOFF6 PUPDOFF5 PUPDOFF4 RSV RSV RSV PUPDOFF0
R/W R/W R/W R/W R/O R/O R/O R/W
BIT
NAME RESET FUNCTION
0 PUPDOFF0 0 Port-2 GPIO pin P2.0 pullup and pulldown resistor power-down configuration by the MCU.
 If the MCU sets this bit to 1, both the pullup and pulldown resistors are disabled on P2.0.
 If the MCU clears this bit to 0, either the pullup or pulldown resistor is enabled for P2.0; with
the selection is controlled by bit 0 of the PUPDSLCT_P2 register.
The power-up default is to enable the pullup/pulldown resistor for the P2.0 pin.
3−1 RSV 000b Reserved
6−4 PUPDOFF[N]
(N = 4 to 6)
000 Port-2 GPIO pins P2.4–P2.6 pullup and pulldown resistor power down configuration by the MCU.
 If the MCU sets any of these bits to 1, both the pullup and pulldown resistor are disabled on
pins P2.4–P2.6.
 If the MCU clears this bit to 0, either the pullup or the pulldown resistor is enabled for
P2.4–P2.6, with the selection controlled by the corresponding bit of the PUPDSLCT_P2
register.
The power-up default is to enable the pullup/pulldown cell for P2.4–P2.6 pins.
7 PUOFF7 0 Port-2 GPIO pin P2.7 pullup resistor configuration by the MCU.
 If the MCU sets this bit to 1, the pullup resistor is disabled on pin P2.7.
 If the MCU clears this bit to 0, the pullup resistor is enabled on pin P2.7.
The power-up default is to enable the pullup resistor on the P2.7 pin.
9.4 PUPDSLCT_P3: GPIO Pullup and Pulldown Resistor Selection Register for Port 3
(XDATA at F08C)
The PUPDSLCT_P3 register allows the MCU to select either the pullup or pulldown internal resistor to be
connected to the port 3 GPIO pins. To turn off both the pullup and pulldown resistors, the MCU must configure
the corresponding bit in the PUPDPWDN_P3 register.
PUSEL[N] means the pullup/pulldown resistors selection for P3.N pin.
76543210
PUSEL7 PUSEL6 PUSEL5 PUSEL4 PUSEL3 PUSEL2 RSV RSV
R/W R/W R/W R/W R/W R/W R/O R/O
BIT
NAME RESET FUNCTION
1−0 RSV 00 Reserved = 00
7−2 PUSEL[N]
(N = 2 to 7)
111111 Port 3 GPIO pin P3.2–P3.7 pullup and pulldown resistor selection by the MCU.
 If the MCU sets any of these bits to 1, the corresponding pullup resistor is enabled and the
pulldown resistor is disabled.
 If the MCU clears any of these bits to 0, the corresponding pulldown resistor is enabled and the
pullup resistor is disabled.
The power-up default is the pullup resistor enabled and the pulldown resistor disabled for
pins P3.2–P3.7.