Datasheet

8−17
SLLS535E − April 2008 TUSB6250
8.10.1 IEPCNFG_n: Input Endpoint Configuration Register (n = 1 to 4) (XDATA at
F010, F020, F030, F040)
The IEPCNFG register contains various bits used to configure and control the specified endpoint.
76543210
UBME NAK_INTE TOGLE DBUF STALL USBIE RST_TOGLE MAP_SECF
R/W R/W R/O R/W R/W R/W W/O R/W
BIT NAME RESET FUNCTION
0 MAP_SECF 0 Map data buffer to sector FIFO RAM.
MAP_SECF = 0 Endpoint data is stored in 4K-byte endpoint data buffer.
MAP_SECF = 1 Endpoint data is stored in sector FIFO RAM.
1 RST_TOGLE 0 Reset TOGLE bit. This bit always returns 0 when read by the MCU.
The MCU writes a 1 to this bit in order to reset the TOGLE bit (bit 5) to 0.
2 USBIE 0 USB interrupt enable on transaction completion
USBIE = 0 No interrupt
USBIE = 1 Interrupt on transaction completion
3 STALL 0 USB stall condition indication.
STALL= 0 No stall
STALL= 1 USB stall condition. If set by the MCU, a STALL handshake is initiated.
4 DBUF 0 Double buffer enable for input endpoint_n.
DBUF= 0 Primary buffer only (X-buffer only)
DBUF= 1 TOGLE-bit selects X or Y-buffer
5 TOGLE 0 USB toggle bit. This read-only bit reflects the toggle sequence bit of DATA0, DATA1. The actual
response from the TUSB6250 also depends on the related STALL and NAK bits. The hardware
updates the TOGLE bit automatically.
TOGLE = 0 The TUSB6205 expects the next in-transfer data packet PID to be DATA0.
TOGLE = 1 The TUSB6205 expects the next in-transfer data packet PID to be DATA1.
6 NAK_INTE 0 NAK interrupt enable
NAK_INTE = 0 NAK does not trigger an interrupt.
NAK_INTE = 1 NAK triggers an interrupt.
7 UBME 0 UBM enable/disable bit. Set/cleared by the MCU.
UBME = 0 UBM cannot use this endpoint.
UBME = 1 UBM can use this endpoint
8.10.2 IEPBBADRX_n: Input Endpoint X-Buffer Base Address Register (n = 1 to 4)
(XDATA at F011, F021, F031, F041)
The IEPBBADRX_n register contains the X-buffer base address for the specified input endpoint.
76543210
A11 A10 A9 A8 A7 A6 A5 A4
R/W R/W R/W R/W R/W R/W R/W R/W
BIT
NAME RESET FUNCTION
7−0 A[11:4] 00h This is the middle 8-bit value of the complete (1110 & A[11:4] & 0000) 16-bit X-buffer base address.
See Figure 8−4. This value can be set only by the MCU. The UBM or MCU uses this value as the start
address of the X-buffer for a given transaction.